Description
The TUSB1210 is a USB2.0 transceiver chip, designed to interface with a USB controller via a ULPI interface. It supports all USB2.0 data rates (High-Speed 480Mbps, Full-Speed 12 Mbps and Low-Speed 1.5Mbps) in both Host and Peripheral modes. It additionally supports a UART mode and legacy ULPI serial modes.

TUSB1210 also supports the OTG (Ver1.3) optional addendum to the USB 2.0 Specification, including Host Negotiation Protocol (HNP) and Session Request Protocol (SRP).

TUSB1210(http://www.kynix.com/Search/TUSB1210.html) is optimized to be interfaced through a 12-pin SDR UTMI Low Pin Interface (ULPI), supporting both input clock and output clock modes, with 1.8 V interface supply voltage.

TUSB1210 integrates a 3.3 V LDO, which makes it flexible to work with either battery operated systems or pure 3.

Features
USB2.0 PHY Transceiver Chip, Designed to Interface With a USB Controller via a ULPI Interface, Fully Compliant With:
Universal Serial Bus Specification Rev. 2.0
On-The-Go Supplement to the USB 2.0 Specification Rev. 1.3
UTMI+ Low Pin Interface (ULPI) Specification Rev. 1.1
ULPI 12-pin SDR Interface
DP/DM Line External Component Compensation (TI Patent Pending)
Interfaces to Host, Peripheral and OTG Device Cores; Optimized for Portable Devices or System ASICs with Built-in USB OTG Device Core
Complete USB OTG Physical Front-End that Supports Host Negotiation Protocol (HNP) and Session Request Protocol (SRP)
VBUS Overvoltage Protection Circuitry Protects VBUS Pin in Range –2 V to 20 V
Internal 5 V Short-Circuit Protection of DP, DM, and ID Pins for Cable Shorting to VBUS Pin
ULPI Interface:

I/O Interface (1.8V) Optimized for Non-Terminated 50 Ω Line Impedance
ULPI CLOCK Pin (60 MHz) Supports Both Input and Output Clock Configurations
Fully Programmable ULPI-Compliant Register Set
Full Industrial Grade Operating Temperature Range from –40°C to 85°C
Available in a 32-Pin Quad Flat No Lead [QFN (RHB)] Package
Can Be Interfaced to Peripheral, Host or OTG Controller Devices via ULPI.
Suited to Portable Devices or System ASICs with Built-In Controller Core.
Complete HS-USB Physical Front-End:
Supports High Speed (480 Mbit/s), Full Speed (12 Mbit/s) and Low Speed (1.5 Mbit/s)
Integrated Phase-Locked Loop (PLL) Supporting 2 Clock Frequencies 19.2 MHz/26 MHz